Tuesday, October 5, 2010

Quiz Circuit

author: Andy Collinson
e-mail: anc@mitedu.freeserve.co.uk
web site: http://www.zen22142.zen.co.uk
I've had a few requests for a quiz circuit, so here is a 4 input design which can easily be modified. Maybe, I should write the application notes in the style of a game show host...
Circuit diagram


Notes:
This design uses four IC's and has four input circuits and four independent outputs and a single master reset switch. The outputs here are LED's but may be modified to drive lamps or buzzers. Only one output LED can be lit at any time. The first person to press their input switch, A,B,C,D will light the corresponding output LED, disabling the other inputs.
The circuit uses all CMOS IC's part numbers shown on the diagram. The supply voltage may be anything between 3 and 15 volts. Alternatively, it may be built using equivalent TTL IC's and powered on 5 volts. The main component in this circuit is a bistable latch, here it is based on the dual 4013 D-type flip flop.
Circuit Operation:
Pressing the reset switch will clear all flip flops and extinguish any lit LED's. Under this condition the Q outputs will all be low (logic 0) and NOT Q outputs will be high (logic 1). All four NOT Q outputs are fed to a 4 input AND gate, the 4082 whose output will also be high. The output of the 4082 is wired to one input of each 2 input AND gate (4081). Switch inputs A,B,C,D are all non latching push button switches, the first person to press their switch will cause the corresponding AND gate (4081) to go high and trigger the preset input of the 4013 D-type flip flop. This will latch and light the appropriate LED. Also the triggered flip flop will have its NOT Q output, set at low, this changes the 4082 output to low and prevents any further triggering of the other flip flops. Switch contact de-bouncing is not required as the first press will latch one of the bistables. Pressing the reset switch, restores the circuit to its former state. I would recommend using heavy duty push button switches, as in use they are likely to be under some stress.
 

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I am an electrical and electronics engineering kathmandu university batch 2007
 
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